Staff ASIC Design Engineer

Ottawa West, ONTARIO | 16 days

Job Summary

Ottawa West
VentureLoop

Job Description


Responsibilities

  • Subsystem development in large mixed signal ASICs
  • Work with system architect to define spec/micro-architecture and RTL development
  • Design size/timing/power optimization via micro-architecture/RTL/Synthesis
  • Layout support for quality final product and TTM

Requirements

  • B.Sc.EE or Computer Engineering Required, M.S or Ph.D preferred
  • Minimum of 2-7 year ASIC design experience
  • Solid design (micro-architecture/implementation) and debugging skills
  • Working knowledge of DSP/FEC and communication theories
  • Strong problem solving skills
  • Good verbal/written communication skills and team work
  • Good knowledge of ASIC design flow/tools, with backend knowledge being a great asset
  • Working knowledge of MatLab and other scripting languages
  • Knowledge of OTN, CAUI and other telecom protocols

Infinera is an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to race, religion, color, national origin, sex, age, status as a protected veteran, or status as a qualified individual with disability. EEO Employer/Vet/Disabled.


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